Current mode 900 MHz CMOS mixer
作者： W.-C. Cheng , C.-F. Chan , C.-S. Choy , K.-P. Pun
DOI: 10.1080/00207210600562108
关键词:
摘要: This paper presents the design and measurement results of a 1.2 V 900 MHz CMOS mixer. We use current mode multiplication instead voltage to reduce operating 1.2 V. Moreover, new mixer has good linearity; measured input-referred 1-dB compression point Third-order Input Intercept Point (IIP3) are 3 dBm 10 dBm respectively. The mixer-circuit is specially designed for low communication circuits using RF CMOS. power dissipation 3 mW from single supply. A test circuit been fabricated with 0.6 µm technology. multiplier cell occupies an area 400 µm × 400 µm.
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