作者: Jeffrey A. Andrews , Nicholas R. Baker , Michael Abrash , J. Andrew Goossen
DOI:
关键词:
摘要: A CPU module includes a host element configured to perform high-level host-related task, and one or more data-generating processing elements task associated with the task. Each logic receive input data, process data produce output data. The amount of is greater than an ratio defines decompression ratio. In implementation, performed by pertains graphics generation geometry (such as triangle vertices) for use within can transfer GPU via at least locked set cache memory. retrieves from set, periodically forwards tail pointer cacheable location that informs its progress in retrieving