作者: Gary L. Swoboda
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摘要: A controllable ring oscillator clock circuit includes a plurality of stages disposed in linear chain. Each stage has latch that determines if this is the last ring. In propagate state pulse sent to next stage. return returned prior The latches are programmed like shift register. more command transfers This increases length delay line and thus decreases frequency. less state, decreasing increasing preferred embodiment deployed as even odd pairs with only or changed at one time. enables simple structure because operate master-slave flip-flop, data can move single