Small low glitch current mode analog to digital converters for artificial intelligence

摘要: Single-stage and multiple-stage current-mode Analog-to-Digital converters (iADC)s utilizing apparatuses, circuits, methods are described in this disclosure. The disclosed iADCs can operate asynchronously be free from the digital clock noise, which also lowers dynamic power consumption, reduces circuitry overhead associated with running clocks. For their pseudo-flash operations, do not require input current signals to replicated saves area, improves accuracy. Moreover, of multi-staging increase resolutions while keeping consumption die size (cost) low. iADC's asynchronous topology facilitates decoupling analog-computations digital-computations, helps reduce glitch, gradual degradation (instead an abrupt drop) accuracy increased signal frequency. arranged minimal (i.e., digital-light), thereby saving on consumption.