Design of low-power PVT-aware circuits for power management applications

作者: Dong Wang

DOI: 10.32657/10220/45692

关键词:

摘要:

参考文章(108)
H. Tsuno, K. Anzai, M. Matsumura, S. Minami, A. Honjo, H. Koike, Y. Hiura, A. Takeo, W. Fu, Y. Fukuzaki, M. Kanno, H. Ansai, N. Nagashima, Advanced Analysis and Modeling of MOSFET Characteristic Fluctuation Caused by Layout Variation symposium on vlsi technology. pp. 204- 205 ,(2007) , 10.1109/VLSIT.2007.4339693
H.J. Oguey, D. Aebischer, CMOS current reference without resistance IEEE Journal of Solid-state Circuits. ,vol. 32, pp. 1132- 1135 ,(1997) , 10.1109/4.597305
C. Gallon, G. Reimbold, G. Ghibaudo, R.A. Bianchi, R. Gwoziecki, S. Orain, E. Robilliart, C. Raynaud, H. Dansas, Electrical analysis of mechanical stress induced by STI in short MOSFETs using externally applied stress IEEE Transactions on Electron Devices. ,vol. 51, pp. 1254- 1261 ,(2004) , 10.1109/TED.2004.831358
E.N.Y. Ho, P.K.T. Mok, A Capacitor-Less CMOS Active Feedback Low-Dropout Regulator With Slew-Rate Enhancement for Portable On-Chip Application IEEE Transactions on Circuits and Systems Ii-express Briefs. ,vol. 57, pp. 80- 84 ,(2010) , 10.1109/TCSII.2009.2038630
Khong-Meng Tham, K. Nagaraj, A low supply voltage high PSRR voltage reference in CMOS process IEEE Journal of Solid-state Circuits. ,vol. 30, pp. 586- 590 ,(1995) , 10.1109/4.384173
G.A. Rincon-Mora, P.E. Allen, A low-voltage, low quiescent current, low drop-out regulator IEEE Journal of Solid-state Circuits. ,vol. 33, pp. 36- 44 ,(1998) , 10.1109/4.654935
E. Vittoz, J. Fellrath, CMOS analog integrated circuits based on weak inversion operations IEEE Journal of Solid-State Circuits. ,vol. 12, pp. 224- 231 ,(1977) , 10.1109/JSSC.1977.1050882
Yuan Taur, D.A. Buchanan, Wei Chen, D.J. Frank, K.E. Ismail, Shih-Hsien Lo, G.A. Sai-Halasz, R.G. Viswanathan, H.-J.C. Wann, S.J. Wind, Hon-Sum Wong, CMOS scaling into the nanometer regime Proceedings of the IEEE. ,vol. 85, pp. 486- 504 ,(1997) , 10.1109/5.573737
K. Kanda, K. Nose, H. Kawaguchi, T. Sakurai, Design impact of positive temperature dependence of drain current in sub 1 V CMOS VLSIs custom integrated circuits conference. ,vol. 36, pp. 1559- 1564 ,(1999) , 10.1109/4.953485
Yi-Ming Sheu, Sheng-Jier Yang, Chih-Chiang Wang, Chih-Sheng Chang, Li-Ping Huang, Tsung-Yi Huang, Ming-Jer Chen, Carlos H Diaz, Modeling mechanical stress effect on dopant diffusion in scaled MOSFETs IEEE Transactions on Electron Devices. ,vol. 52, pp. 30- 38 ,(2005) , 10.1109/TED.2004.841286