Multiple Round-Trip Delay-Based Architecture for Si-Integrated Photonic Reservoir Computing

摘要: In recent years the field of data processing has faced new challenges related to ability systems process large amounts at high-speed rates with good energy efficiency. These critical issues can be addressed through implementation, a physical layer, machine learning techniques. One them is called reservoir computing [1] and been already tested experimentally using photonic components, hence leading as candidate for high-speed, energy-efficient processing.