摘要: This chapter describes fundamental compiler techniques for VLIW DSP processors. We begin with a review of architecture concepts, as far relevant the writer. As case study, we consider TI TMS320C62xTM clustered processor family. survey main tasks code generation, discuss instruction selection, cluster assignment, scheduling and register allocation in some greater detail, present selected these, both heuristic optimal ones. Some emphasis is put on phase ordering problems coupled integrated generation techniques.
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