摘要: … Although the contributions of process engineers and circuit designers to power-aware designs are crucial, architects and systems-level designers also need to contribute a …
core.ac.uk
acm.org 
sci-hub.se 参考文章(12)
C. Lefurgy, E. Piccininni, T. Mudge, Reducing code size with run-time decompression high performance computer architecture. pp. 218- 228 ,(2000) , 10.1109/HPCA.2000.824352
Artur Klauser, Srilatha Manne, Dirk Grunwald, Pipeline gating: speculation control for energy reduction international symposium on computer architecture. ,vol. 26, pp. 132- 141 ,(1998) , 10.1145/279358.279377
David Brooks, Vivek Tiwari, Margaret Martonosi, Wattch: a framework for architectural-level power analysis and optimizations international symposium on computer architecture. ,vol. 28, pp. 83- 94 ,(2000) , 10.1145/339647.339657
Kimiyoshi Usami, Mark Horowitz, Clustered voltage scaling technique for low-power design international symposium on open collaboration. pp. 3- 8 ,(1995) , 10.1145/224081.224083
S.W. Moore, G.S. Taylor, P.A. Cunningham, R.D. Mullins, P. Robinson, Self calibrating clocks for globally asynchronous locally synchronous systems international conference on computer design. pp. 73- 78 ,(2000) , 10.1109/ICCD.2000.878271
N. Vijaykrishnan, M. Kandemir, M. J. Irwin, H. S. Kim, W. Ye, Energy-driven integrated hardware-software optimizations using SimplePower international symposium on computer architecture. ,vol. 28, pp. 95- 106 ,(2000) , 10.1145/339647.339659
Matthew Farrens, Arvin Park, Gary Tyson, Modifying VM hardware to reduce address pin requirements ACM SIGMICRO Newsletter. ,vol. 23, pp. 210- 213 ,(1992) , 10.1145/144965.145808
R. Gonzalez, M. Horowitz, Energy dissipation in general purpose microprocessors IEEE Journal of Solid-state Circuits. ,vol. 31, pp. 1277- 1284 ,(1996) , 10.1109/4.535411
E. Macii, C. Silvano, D. Sciuto, L. Benini, G. De Micheli, Address bus encoding techniques for system-level power optimization design, automation, and test in europe. pp. 861- 867 ,(1998) , 10.5555/368058.368440
Trevor Pering, Thomas Burd, Robert Brodersen, Voltage scheduling in the IpARM microprocessor system Proceedings of the 2000 international symposium on Low power electronics and design - ISLPED '00. pp. 96- 101 ,(2000) , 10.1145/344166.344530