作者: Sudhir K. Madan
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摘要: A ten transistor low voltage, power static random access memory cell (10) includes a first inverter (12) cross-coupled to second (18). series combination of pass (24) and bitline select (28) is connected between an output node (13) the (36). write (32) placed in parallel with (24). (26) (30) (17) (18) (38). (34) (26).