作者: Seonil Choi , Ju‐wook Jang , Sumit Mohanty , Viktor K. Prasanna
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摘要: Reconfigurable architectures such as FPGAs are flexible alternatives to DSPs or ASICs used in mobile devices for which energy is a key performance metric. offer several design parameters operating frequency, precision, amount of memory, degree parallelism, etc. These define large space that must be explored find energy-efficient solutions. It also challenging predict the variation at early phases when modified algorithm level. Efficient traversal requires high-level modeling facilitate rapid estimation system-wide energy. However, do not exhibit structure like, example, RISC processor well low-level models available. To address this scenario, we propose domain-specific technique kernel exploits knowledge and target architecture family given develop model. This model captures features, affecting performance, power functions based on these parameters. A function derived cycle specific state each building block architecture. understand impact various can basis algorithms. Our quickly obtain fairly accurate estimate dissipation data paths configured using FPGAs. We demonstrate our methodology by applying it four domains.