Fixed latency configurable tap digital filter

作者: Achanta Srinivas

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摘要: A fixed latency configurable tap or fixed-tap digital filter may a signal in amount of time, regardless the number taps. The include one more clock, plurality registers shift register, an adder, accumulator, and/or scaler. In at least embodiment, running average be maintained as samples are received such that remains with constant clock cycles.

参考文章(6)
Sundeep Venkatraman, Amaresh V. Malipatil, Sunil Srinivasa, Pervez M. Aziz, Shiva Prasad Kotagiri, Digital frequency band detector for clock and data recovery ,(2013)
Allen Le Roy Limberg, Chandrakant Bhailalbhai Patel, Tianmin Liu, Jian Yang, Rapid-update adaptive channel-equalization filtering for digital radio receivers, such as HDTV receivers ,(1994)
Steven L. Garverick, Joseph E. Krisciunas, Donald T. McGrath, Philippe Jacob, Programmable digital signal processor system for processing electrical power signals ,(1993)