作者: Guanying Wu , Xubin He , Ningde Xie , Tong Zhang
DOI: 10.1145/2489792
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摘要: This article presents a cross-layer codesign approach to reduce SSD read response latency. The key is cohesively exploit the NAND flash memory device write speed vs. raw storage reliability trade-off at physical layer and runtime data access workload dynamics system level. Leveraging variation, we can opportunistically slow down hence improve reliability. naturally enables an opportunistic use of weaker error correction schemes that directly We develop disk-level scheduling scheme effectively smooth in order maximize occurrence slowdown. Using 2 bits/cell with BCH-based as test vehicle, carry out extensive simulations over various workloads demonstrate this developed co-design solution average latency by up 59.4p without sacrificing throughput performance.