DOI: 10.1063/1.2740566
关键词:
摘要: Future nanoscale electronics built up from an Avogadro number of components need efficient, highly scalable, and robust means communication in order to be competitive with traditional silicon approaches. In recent years, the networks-on-chip (NoC) paradigm emerged as a promising solution interconnect challenges silicon-based electronics. Current NoC architectures are either regular or fully customized, both which represent implausible assumptions for emerging bottom-up self-assembled molecular that generally assumed have high degree irregularity imperfection. Here, we pragmatically experimentally investigate important design tradeoffs properties irregular, abstract, yet physically plausible three-dimensional (3D) small-world fabric is inspired by modern network-on-chip paradigms. We vary framework's key parameters, such connectivity, switch nodes, distribution long- versus short-range connections, measure network's relevant characteristics. further explore robustness against link failures ability efficiency solve simple toy problem, synchronization task. The results confirm (1) computation irregular assemblies disruptive computing (2) 3D fabrics power-law decaying shortcut lengths major advantages over local two-dimensional topologies.