Pin selectable I2C slave addresses
作者： Igor Furlan
DOI:
关键词:
摘要: This document discusses, among other things, a multi-address Inter-Integrated Circuit (I 2 C) selection circuit configured to receive number (N) of identification (ID) signals from corresponding ID pins slave I C device and at least one data signal serial line (SDA) an bus or clock (SCL) the bus, determine 4 power N (4 ) selectable addresses using signal. In example, can single pin device.
lens.org 参考文章(18)
Jeffrey J. Dahlin, Apparatus and method for configurable device pins ,(2005)
Stephen Edward Hodges, Nicolas Villar, James Scott, Michael David Hazas, Automatic Addressing Protocol for a Shared Bus ,(2010)
Amrita Deshpande, Alma Anderson, Jean-Marc Irazabal, Dynamic 12c slave device address decoder ,(2006)
Zachary Nathan Fister, Christopher Alan Adkins, Donald William Chapelle, Dynamic address change for slave devices on a shared bus ,(2009)
Zachary Nathan Fister, Gregory Scott Woods, Dynamic Address Change Optimizations ,(2014)
Robert L. Reay, David M. Dwelley, Multi-bit digital input using a single pin ,(2003)
Neal Crook, Ian Parr, Systems and methods for addressing and synchronizing multiple devices ,(2010)
Amrita Deshpande, Alma Anderson, Jean-Marc Irazabal, Stephen Blozis, Paul Boogaards, Programming parallel i2c slave devices from a single i2c data stream ,(2006)
Scott Laxton, Arched pillow assembly ,(2005)
Vincent Quiquempoix, Patrick K. Richards, Gabrielle Bellini, Configuring Multi-Bit Slave Addressing on a Serial Bus Using a Single External Connection ,(2008)