作者: Mohamed Ghoneim , Rana Hesham , Heba Yassin , Ahmed Madian
DOI: 10.1007/S10470-020-01753-3
关键词:
摘要: Two voltage-mode topologies single input multi-output universal fractional filters with high impedance are proposed. The proposed analog consist of three DVCC+ blocks, two grounded capacitors and resistors targeting the minimum passive elements. provide a realization for all standard filter functions (HP, LP, BP, AP notch filter). effect Fractional order on responses in range $$\alpha$$ from 0.7 to 1.2 was studied. has been investigated different terms cutoff, gain, phase noise. central frequency designed be 110 KHz first topology, while that second topology is around 100 KHz. simulated using Cadence TSMC 130nm dual supply voltages $$\pm \,0.75V$$ . A performance comparison between literature shows architecture gives an acceptable performance.