III-V field-effect transistors for low power digital logic applications

摘要: Sustaining Moore's Law of doubling CMOS transistor density every twenty four months will require not only shrinking the dimensions, but also introduction new materials and device architectures to achieve highest performance per watt power dissipation. Compound semiconductor-based quantum-well field effect transistors have recently emerged as a promising option for future ultra low-power logic applications. This paper reviews opportunities challenges in this exciting research.