作者: J.-B. Shyu , G.C. Temes , F. Krummenacher
DOI: 10.1109/JSSC.1984.1052250
关键词:
摘要: Explicit formulas are derived using statistical methods for the random errors affecting capacitance and current ratios in MOS integrated circuits. They give dependence of each error source on physical dimensions, standard deviations fabrication parameters, bias conditions, etc. Experimental results, obtained both matched capacitors sources a 3.5-/spl mu/m NMOS technology, confirmed theoretical predictions. Random effects represent ultimate limitation achievable accuracy switched-capacitor filters, D/A converters, other analog The results indicate that 9-bit matching can be an 8-bit without difficulty if systematic reduced proper design layout techniques.