Content addressable memory cell

摘要: Architecture, circuitry, and methods are provided for producing a content addressable memory (CAM). The CAM includes one or more cells arranged in an array. Each cell is symmetrical about its x- y-axis to form rows columns of the Additionally, each can use either SRAM DRAM storage implemented binary ternary arrangement. If design, then size no than 4 microns by 1-½ microns, assuming 0.15 micron critical dimension. Critical dimension noted as smallest resolvable particular process being employed. utilizes selection circuitry that will disable compare circuit during times when operation not performed. This ensure consume power during, example, read write operation. uses eight conductors per cell, wherein minimum width pitch co-planar on single metal layer. Another layer local interconnects pair which carry differential bit lines lines. do extend across entire and, therefore, localized only small region effectuate ground supplies cell.