The PowerPC 603 C++ Verilog interface model

摘要: Describes an object-oriented model of the PowerPC 603 microprocessor, and incorporation this into Verilog using Programming Language Interface (PLI). The is behavioral written in C++. It has a stand-alone mode with external environment simulated In mode, disabled would be Verilog. This paper discusses model, procedural interface used to communicate world, implementation PLI interface. also uses models two modes. >