作者: Shingo Suzuki
DOI:
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摘要: An integrated circuit, in accordance with one embodiment of the present invention, includes a first device under test (DUT) module coupled to ring oscillator and second DUT module. The is biased such that interface traps are generated during mode. result decrease drive current maintain reference operating frequency module, mode, function current. circuit may also include comparator for generating an output signal as difference between modules.