Processor system with execution-reservable accelerator
作者： Yukio Fujii , Hiroaki Nakata , Masakazu Ehama , Koji Hosogi , Kazuhiko Tanaka
DOI:
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摘要: A processor system capable of performing high-speed image processing is provided. The includes a CPU and an accelerator. connected to the accelerator issues reservations activation requests said has issued request number counter for counting by processed requests. can activate itself when value larger than counter.
lens.org 参考文章(9)
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