System and method of preventing the simulation of a circuit if a change to the circuit topology is detected

作者: Lawrence Meares

DOI:

关键词:

摘要: A system, method, and software module for preventing a simulation and/or analysis of circuit described in netlist if change the topology has been detected. The method entails scanning changes prior to performing or on circuit. If no detected, then is allowed proceed. If, other hand, some cases prevented. methodology allows prospective customer perform complicated with freely-distributed demo program, yet it does not rise manufacturing giving away its since restricted that particular topology.

参考文章(52)
Hidetoshi Chikata, Shunzo Yamashita, Naoki Kato, Kazuo Yano, Design method of a logic circuit ,(2001)
Chia-Huei Lee, Ming-Chih Lai, Martin Lu, Active path extraction for HDL code ,(2002)
Kenneth S. McElvain, David S. Rickel, Methods and apparatuses for checking equivalence of circuits ,(2001)
Yaroku Sugiyama, Yasunori Abe, Hiroyuki Sugiyama, Terunobu Maruyama, Ryouichi Yamashita, Noriyuki Ito, Interactive circuit designing apparatus ,(1995)