作者: John Wishneusky , Gavin J. Stark
DOI:
关键词:
摘要: A Media Access Control (MAC) Bus interface definition and multiplexor scheme that may be implemented to provide chip layout-insensitive connections between a number of communication physical layer port entities single buffer manager or communications controller entity, utilizing set independent pipelined buses. The comprising three buses: MAC In Data bus, Out Message bus. Each bus can operated with an timing signals enable data transfers system side block one more network blocks. provides for each the buses, enables connect multiple multiplexors also cascaded.