Semiconductor package with full plating on contact side surfaces and methods thereof

作者: Saravuth Sirinorakul

DOI:

关键词:

摘要: Embodiments of the present invention are directed to a semiconductor package with full plating on contact side surfaces. The includes top surface, bottom surface opposite and surfaces between Contacts located peripheral edges surface. Each contacts first that is flush second at one each continuously plated. Portions an internal layer exposed along package. has molding compound least partially encapsulating contacts, wherein part have different texture.

参考文章(128)
Marcos Karnezos, Tab grid array ,(1993)
Robinson Quiazon, Hin Goh, Geun Kim, Jae Lee, Frederick Dahilig, Sheila Alvarez, Semiconductor package flip chip interconnect having spacer ,(2005)
Saravuth Sirinorakul, Somchai Nondhasitthichai, Singulation method for semiconductor package with plating on side of connectors ,(2011)
Maria Estacio, Dual stacked die package ,(2001)
Chien-Ping Huang, Image sensor of a quad flat package ,(2001)
Hidetaka Tone, Hiroyuki Ohira, Kouichi Watanabe, Ryoji Honma, Soichi Kawasaki, System and carrier for testing semiconductor integrated circuit devices ,(1993)
Hiroyuki Komatsu, Hideki Matsuzawa, Akinobu Abe, Tatsuya Inatsugu, Hideki Toya, Lead frame and method of manufacturing the same ,(2003)