Variable rotational assignment of interconnect levels in integrated circuit fabrication

摘要: Integrated circuit fabrication techniques are provided which allow non-horizontal/non-vertical wires to traverse the entire chip surface, rather than just corners as in conventional Manhattan geometry, while interconnecting points. This is achieved by employing a variable rotational assignment methodology with respect interconnect layers or levels during IC operation. These thus eliminate litho step problem, reduce distances and lessen influence of capacitance interaction between wires.