Signal flow graphs for modelling of switching converters with reduced redundant power processing
作者： R. Loera-Palomo , J. Leyva-Ramos , J.A. Morales-Saldaña
DOI: 10.1049/IET-PEL.2012.0038
关键词:
摘要: This study presents a procedure for modelling of switching converters with reduced redundant power processing ( R 2 P ). class consists two basic DC-DC connected in non-cascading structure. The proposed uses signal flow graphs on , according to currents and voltages relationship each In the beginning, does not require specific knowledge being used, but only structure converter . corresponding are incorporated later. Although is applied it can also be other configurations that based interconnection converters. resulting models validated using simulations experimental results.
sci-hub.se 参考文章(29)
Benjamin C. Kuo, Automatic Control Systems ,(1962)
M. Veerachary, T. Senjyu, K. Uezato, Signal flow graph nonlinear modelling of interleaved converters IEE Proceedings - Electric Power Applications. ,vol. 148, pp. 410- 418 ,(2001) , 10.1049/IP-EPA:20010573
M. Veerachary, Signal flow graph modelling of multi-state boost DC-DC converters IEE Proceedings - Electric Power Applications. ,vol. 151, pp. 583- 589 ,(2004) , 10.1049/IP-EPA:20040680
M. Veerachary, Two-loop voltage-mode control of coupled inductor step-down buck converter IEE Proceedings - Electric Power Applications. ,vol. 152, pp. 1516- 1524 ,(2005) , 10.1049/IP-EPA:20045104
M. Veerachary, Analysis of interleaved dual boost converter with integrated magnetics: signal flow graph approach IEE Proceedings - Electric Power Applications. ,vol. 150, pp. 407- 416 ,(2003) , 10.1049/IP-EPA:20030260
Joe C. P. Liu, Chi K. Tse, N. K. Poon, Bryan M.H. Pong, Y. M. Lai, A PFC voltage regulator with low input current distortion derived from a rectifierless topology IEEE Transactions on Power Electronics. ,vol. 21, pp. 906- 911 ,(2006) , 10.1109/TPEL.2006.876887
H.Y. Kanaan, G. Sauriol, K. Al-Haddad, Small-signal modelling and linear control of a high efficiency dual boost single-phase power factor correction circuit Iet Power Electronics. ,vol. 2, pp. 665- 674 ,(2009) , 10.1049/IET-PEL.2008.0286
R. Loera-Palomo, J.A. Morales-Saldaña, J. Leyva-Ramos, E.E. Carbajal-Gutierrez, Controller design for a power factor correction regulator R 2 P 2 Iet Power Electronics. ,vol. 3, pp. 784- 792 ,(2010) , 10.1049/IET-PEL.2009.0075
L.K. Wong, T.K. Man, Small signal modelling of open-loop SEPIC converters Iet Power Electronics. ,vol. 3, pp. 858- 868 ,(2010) , 10.1049/IET-PEL.2009.0300
M. Veerachary, Modelling and analysis of cascade step-down converters IEE Proceedings - Electric Power Applications. ,vol. 152, pp. 41- 50 ,(2005) , 10.1049/IP-EPA:20041043