2- m, 1.6-mW Gated- Sampler with 72-dB

作者: Albert K. Lu , Scott C. Munroe

DOI:

关键词:

摘要: The sampler is often the limitation in determining how early signal chain conversion to discrete time can be done. We have fabricated a novel high-speed, wideband core based upon charge-domain gated- cell that has measured spurious free dynamic range (SFDR) of 72 dB for sample rate 160 Ms/s and an input frequency 320.25 MHz. sampling bandwidth 880 This performance achieved at 1% power area state-of-the-art track-and-hold circuit implemented much more advanced IC technology. Simulations indicate far higher possible process with minor optimization.

参考文章(8)
C. Fiocchi, U. Gatti, F. Maloberti, A 10 b 250 MHz BiCMOS track and hold international solid-state circuits conference. pp. 144- 145 ,(1997) , 10.1109/ISSCC.1997.585308
J. D. E. Beynon, David Robert Lamb, Charge-coupled devices and their applications ,(1980)
A.N. Karanicolas, A 2.7 V 300 MSample/s track-and-hold amplifier international solid-state circuits conference. pp. 140- 141 ,(1997) , 10.1109/ISSCC.1997.585306
L. Schillaci, A. Baschirotto, R. Castello, A 3-V 5.4-mW BiCMOS track & hold circuit with sampling frequency up to 150 MHz IEEE Journal of Solid-state Circuits. ,vol. 32, pp. 926- 932 ,(1997) , 10.1109/4.597282
A. Hairapetian, An 81 MHz IF receiver in CMOS international solid-state circuits conference. ,vol. 31, pp. 1981- 1986 ,(1996) , 10.1109/4.545821
D.H. Shen, Chien-Meen Hwang, B.B. Lusignan, B.A. Wooley, A 900-MHz RF front-end with integrated discrete-time filtering IEEE Journal of Solid-state Circuits. ,vol. 31, pp. 1945- 1954 ,(1996) , 10.1109/4.545817
R. Roovers, M.S.J. Steyaert, A 175 Ms/s, 6 b, 160 mW, 3.3 V CMOS A/D converter IEEE Journal of Solid-state Circuits. ,vol. 31, pp. 938- 944 ,(1996) , 10.1109/4.508206
T. Baumheinrich, B. Pregardier, U. Langmann, A 1-GSample/s 10-b full Nyquist silicon bipolar Track&Hold IC IEEE Journal of Solid-state Circuits. ,vol. 32, pp. 1951- 1960 ,(1997) , 10.1109/4.643652