Instruction and logic to provide vector horizontal compare functionality

摘要: Instructions and logic provide vector horizontal compare functionality. Some embodiments, responsive to an instruction specifying: a destination operand, size of the elements, source mask corresponding portion element data fields in operand; read values from specified for equality. In some detection inequality, trap may be taken. alternative flag set. other field set masked state unequal value(s). all unmasked operand being equal particular value, that value broadcast operand.