Energy efficient analog spiking temporal encoder with verification and recovery scheme for neuromorphic computing systems

摘要: Making a computing system that mimic biological neural behavior in mammalian brain has attracted worldwide attention and endeavor. Neuromorphic systems, employing very-large-scale integration circuits to implement onto hardware, incorporates learning. Neural encoder, as one of the crucial component neuromorphic encodes input information into spikes. By taking temporal response structure consideration, encoding with interspike intervals exhibits capability containing more using time correlation between In this paper, encoder iterative structure, adapting interval scheme, is proposed. Considered tradeoff power consumption die area, we employed an analog implementation spiking neuron. doing so, power-consuming analog-to-digital converters (ADCs) operational amplifiers (Op-AMPs) are not needed, resulting tremendous saving on area. Due processing, growth spike amounts respect neuron number exponential, which significantly reduces consumption.