作者: Sai Yanamandra , Vineet Kulkarni , Shrikant Rao Kulkarni
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摘要: A method to protect computational, in particular cryptographic, devices having multi-core processors from DPA and DFA attacks is disclosed herein. The implies: Defining a library of execution units functionally grouped into business function related units, security scheduler units; Designating at random one among the plurality processing cores on computational device as master core for Causing, under control scheduler, so result randomized flow capable resisting threats initiated device.