作者: Geno Valente , Mary Beth Valente
DOI:
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摘要: A scaling engine, blending mechanism, memory controller, frame buffer and video driver are included within a semiconductor, such as Field Programmable Gate Array (FPGA), to provide broadcasting of signals at high resolution format by combining two or more low create signal in real-time High Definition format, 1080 p. The can be concurrently displayed one image areas on display device any contemplated size, number arrangement.