Method and apparatus for receiving high-speed signals with low latency

摘要: An apparatus and method for receiving high-speed signals having a wide common-mode range with low input-to-output latency. In one embodiment, the receiver includes an integrator to accumulate charge in accordance input signal during integration time interval produce output voltage. A sense amplifier samples converts voltage of logic signal; latch stores signal. alternate preamplifier conditions prior being integrated. another embodiment using multiple receivers, circuitry is added compensate timing errors associated distribution signals. yet coupled equalization circuit that compensates intersymbol interference. accumulated offset integrator.