Data processing system including a main processor and a co-processor and co-processor error handling logic
作者： Mark Edward Dean , Dennis Lee Moeller
DOI:
关键词:
摘要: In a data processing system including main processor (1) and co-processor (2), logic circuit (6) is coupled to receive error busy outputs of the generate an interrupt output on co-incidence active signals latch signal ensure that will honour before executing another instruction.
lens.org 参考文章(7)
Rolfe E Buhrke, John J Mele, Verner K Rice, Donald L Schulte, Dennis A Heck, Configuration control circuit for control and maintenance complex of digital communications system ,(1973)
G Knauft, P Skuin, J Hajdu, E Vogt, Data processing system including a small auxiliary processor for overcoming the effects of faulty hardware ,(1971)
A Ling, Operating condition monitoring in digital computers ,(1972)
Osamu Tada, Tadanari Inoue, Dual computer system with signal exchange system ,(1973)
Rolfe E Buhrke, Gregory I Chang, Edward M Horiuchi, Timing monitor circuit for central data processor of digital communication system ,(1973)
Richard P. Brown, George J. Barlow, Arthur Peters, Diagnostic subsystem for a cache memory ,(1980)
Robert E. Cichon, Wayne J. Lewis, Allen G. Taylor, Method and apparatus for diagnosing faults in a processor having a pipeline architecture ,(1979)