Rewritable programmable logic array

摘要: A Rewritable Programmable Logic Array (R-PLA) which can alter dynamically logic functions during processing by loading a word pattern of bit personalities to realize the specific into memory cells Current Mode (CML) is constructed splitting conventional Random Access Memory (RAM) CML two parts (SEARCH and READ parts). Each cell structure new R-PLA identified with that RAM, differing from complicated flip-flop AND gate proposed in past. SEARCH operate without using special gates each mode enter WRITE data direction mode. part comprises two-channel selector select inputs or inputs, array sense-drive circuits. The circuits are controlled means READ/WRITE control logic-in-memory for on be conducted one multi-emitters transistor an emitter reference R-PLA. let load direction.