A procedure for obtaining a behavioral description for the control logic of a non-linear pipeline

摘要: Much attention has been directed to different aspects of the design pipelines (P. Grun et al., 1999; N. Park 1988; D.A. Lobo 1992; K.N. McNallm 1991). Design control logic nonlinear however, considered as a subsidiary issue in that an RTL description for such can easily be obtained from behavioral description, with use widely available synthesis tools. But, complexity pipeline increases, so does logic. The may extent obtaining even is rendered difficult. We focus on further automating development systems consisting or multifunction by proposing algorithmic technique pipelines. A simplified C++ implementation produces VHDL then presented clarify algorithm. Experimental results reveal connections between nature functions and logic, utilization algorithm, are also presented. Consideration these reduce space exploration more practically feasible subspace.