Semaphore memory to reduce common bus contention to global memory with localized semaphores in a multiprocessor system

摘要: The invention greatly reduces common bus contention by allowing the semaphore test bit and set operations to be performed on each CPU's local bus. lock bits are stored locally in high speed SRAM CPU, coherency of is maintained through a monitoring logic circuit CPU. A CPU wishing take possession performs read its memory, spins until reset at which time it write bit. When written, will updated locally, same operation sent out over every other recognize simultaneously update corresponding memory. This ability spin relieves from great amount traffic that occurs typical systems maintain global