Low power dissipation autozeroed comparator circuit.

摘要: A comparator circuit includes a first amplifier stage whose input can be selectively connected to an voltage and reference voltage. second is the output of final stage, at which rectangular signal output. The represents times in higher or lower than signal. Both stages include capacitance having one plate that stage. other gate transistor control switch. Low power dissipation realized by including follower cascaded with inverter. This structure allows same operation as prior art but offers better design flexibility since all parameters are free rearranged achieve required performance. Furthermore, switch opened delay compared opening results lessening peaks capacitor C1 due clock feed through charge injection.