Methods of fabricating semiconductor devices having buried channel array
作者： Ye-Ro Lee , Hyeong-Sun Hong , Gyo-Young Jin , Jay-Bok Choi , Yoo-Sang Hwang
DOI:
关键词:
摘要: A method of fabricating a semiconductor device comprises forming first and second parallel field regions in substrate, the are extended direction, gate capping layer trench formed substrate respectively, removing layers partially so that landing pad hole is expanded to overlap buried partially, material space, bit line contact by planarizing level top surfaces layers.
lens.org 参考文章(36)
Dong-chan Kim, Jong-ryeol Yoo, Jun-noh Lee, Han-jin Lim, Semiconductor Devices Having Partially Oxidized Gate Electrodes ,(2014)
Tae-Young Chung, Yong-Sung Kim, Fabrication of local damascene finFETs using contact type nitride damascene mask ,(2006)
Jai-kyun Park, Dong-Hyun Kim, Semiconductor device including protrusion type isolation layer ,(2009)
Jong-Han Shin, Jum-Yong Park, Semiconductor device with buried gate and method for fabricating the same ,(2014)
Richard T. Schultz, Trench silicide and gate open with local interconnect with replacement gate process ,(2011)
Hyun-Woo Chung, Gyo-Young Jin, Sung-Kwan Choi, Dong-Soo Woo, Yong-chul Oh, Ji-Young Kim, Yoo-Sang Hwang, Hyeong-Sun Hong, Semiconductor Devices Including Dual Gate Electrode Structures And Related Methods ,(2011)
Joon-seok Moon, Jae-Rok Kahng, Dong-Soo Woo, Hyun-Jung Lee, Hyun-Seung Song, Sang-hyun Lee, Methods of Fabricating Semiconductor Devices Having Increased Areas of Storage Contacts ,(2013)
Anup Bhalla, Xiaobin Wang, John Chen, Hamza Yilmaz, Hong Chang, Nanotube semiconductor devices ,(2014)
Werner Juengling, Devices including fin transistors robust to gate shorts and methods of making the same ,(2009)
Jong-Han Shin, Sung-Jun Kim, Cheol-Hwi Ryu, Method for fabricating semiconductor device with buried gate ,(2009)