FPGA memory optimization for real-time imaging

摘要: most of advanced driver assistance systems are developed for safety and better driving. Safety system using image processing, like Hough transform, requires a lot memory whose underutilization can lead to decrease the real time performances. Internal memories on reconfigurable devices such as FPGA limited in size, number bandwidth. Memory optimization cannot be done solely at application level. Holistic design-space exploration is necessary leverage inherent locality applications reduce accesses. In this paper, we target internal by adding small register-based multi-ported cache front each block increase their The dimensions explored according function implemented. uses cumulative-write exhibiting 1.5 2 speedup compared best implementations. solution optimized with an identical few added registers LUT.