作者: Antonino Cuce , Enrico Pelos
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摘要: A processor operating in a fizzy logic's mode and including fuzzyfication unit receiving plurality of input variables on its being adapted to compute membership value such function, processing connected downstream the produce fuzzy set, i.e. results logic inference operations performed variables, defuzzyfication operative translate into so-called crisp value. The further includes first memory device containing set functions, second which appear THEN part rules, unit.