Fabrication method for IC-oriented Si single-electron transistors

作者: Y. Ono , Y. Takahashi , K. Yamazaki , M. Nagase , H. Namatsu

DOI: 10.1109/16.817580

关键词:

摘要: A new fabrication method for Si single-electron transistors (SETs) is proposed. The applies thermal oxidation to a wire with fine trench across it on silicon-on-insulator substrate. During the oxidation, converted, in self-organized manner, into twin SET structure two islands, one along each edge of trench, due position-dependent oxidation-rate modulation caused by stress accumulation. Test devices demonstrated, at 40 K, that can operate as individual SET's. Since present produces SET's same time tiny area, suitable integrating logic circuits based pass-transistor type and CMOS-type logic, which promises lead LSIs.

参考文章(12)
K. Yano, T. Ishii, T. Sane, T. Mine, F. Murai, T. Kure, K. Seki, A 128 Mb early prototype for gigascale single-electron memories international solid-state circuits conference. pp. 344- 345 ,(1998) , 10.1109/ISSCC.1998.672509
M. Nagase, A. Fujiwara, K. Yamazaki, Y. Takahashi, K. Murase, K. Kurihara, Si nanostructures formed by pattern-dependent oxidation Microelectronic Engineering. ,vol. 41, pp. 527- 530 ,(1998) , 10.1016/S0167-9317(98)00123-3
Kazuhito Tsukagoshi, Kazuo Nakazato, Two-way switching based on turnstile operation Applied Physics Letters. ,vol. 72, pp. 1084- 1085 ,(1998) , 10.1063/1.120972
Effendi Leobandung, Lingjie Guo, Yun Wang, Stephen Y Chou, None, Observation of quantum effects and Coulomb blockade in silicon quantum-dot transistors at temperatures over 100 K Applied Physics Letters. ,vol. 67, pp. 938- 940 ,(1995) , 10.1063/1.114701
Y. Takahashi, K. Iwdate, M. Nagase, K. Murase, S. Horiguchi, K. Kurihara, Y. Nakajima, H. Namatsu, M. Tabe, Fabrication technique for Si single-electron transistor operating at room temperature Electronics Letters. ,vol. 31, pp. 136- 137 ,(1995) , 10.1049/EL:19950082
J. R. Tucker, Complementary digital logic based on the ``Coulomb blockade'' Journal of Applied Physics. ,vol. 72, pp. 4399- 4413 ,(1992) , 10.1063/1.352206
Akira Fujiwara, Yasuo Takahashi, Hideo Namatsu, Kenji Kurihara, Katsumi Murase, Suppression of Effects of Parasitic Metal-Oxide-Semiconductor Field-Effect Transistors on Si Single-Electron Transistors Japanese Journal of Applied Physics. ,vol. 37, pp. 3257- 3263 ,(1998) , 10.1143/JJAP.37.3257
Y. Takahashi, H. Namatsu, K. Kurihara, K. Iwadate, M. Nagase, K. Murase, Size dependence of the characteristics of Si single-electron transistors on SIMOX substrates IEEE Transactions on Electron Devices. ,vol. 43, pp. 1213- 1217 ,(1996) , 10.1109/16.506771
K. Yano, T. Ishii, T. Hashimoto, T. Kobayashi, F. Murai, K. Seki, Room-temperature single-electron memory IEEE Transactions on Electron Devices. ,vol. 41, pp. 1628- 1638 ,(1994) , 10.1109/16.310117
Y. Takahashi, M. Nagase, H. Namatsu, K. Kurihara, K. Iwdate, Y. Nakajima, S. Horiguchi, K. Murase, M. Tabe, Conductance oscillations of a Si single electron transistor at room temperature international electron devices meeting. pp. 938- 940 ,(1994) , 10.1109/IEDM.1994.383257