A Josephson tunnelling logic adder

作者: D. Herrell

DOI: 10.1109/TMAG.1974.1058407

关键词:

摘要: The design of a one-bit full adder circuit based on family simple Josephson logic gates is considered. was fabricated using 25μm minimum linewidth technology and found to operate, even with the large devices used, an add time far superior existing semiconductor circuits.

参考文章(9)
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