Power management method and related chipset and computer system
作者： Cheng-Wei Huang , Shuang-Shuang Qin
DOI:
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摘要: A power management method for use in a computer system having processor, module and phase lock loop circuit (PLL) is provided. The coupled to plurality of peripheral modules the processor are capable being operated working state saving states. includes following. When entered into lowest consumption among states, states detected determine whether specific condition has been matched. If matched, directed control PLL according configuration.
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