IRIS Feature Extraction and Classification using FPGA

摘要: An approach of singular value (SVD) a (mxn) 2-D matrix has been popularly used by researchers for representing image set less than or equal to n values sequenced in descending order which subset only first few are significant is treated as features that image. These further recognition and classification. Though many papers reviewed from literature have discussed about this implantation using software/MATLAB approach, rarely paper appears on hardware implementation SVD algorithm processing applications. This presents the details architecture developed us implement then results Xilinx field programmable gate array Virtex5 extract an iris A comparison between feature extracted MATLAB those obtained simulation ISE tool indicates very good match validating architecture. hamming distance classifier appropriate threshold stored ROM classify images. DOI: http://dx.doi.org/10.11591/ijece.v2i2.158 Full Text: PDF