作者: Xiangcheng Wang , Feng Tian , Yinxing Li , Issa Batarseh
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摘要: A high efficiency parallel post regulator (PPR) for wide range input DC/DC converter is presented in this paper. It achieves ZVS the primary side switches full load due to 0.5 duty cycle operation; it also reduces voltage stresses across main rectifiers and has smaller conduction losses compared with conventional secondary regulators; furthermore requirement of output filters are significantly reduced filtered waveforms PPR produced. 250sim;400Vdc 12V/40A prototype been built detailed experimental results given verify theoretic analysis