Cache store clearing operation for multiprocessor mode

摘要: In a multiprocessor data processing system, all processors must have access to certain communications tables stored in the main memory shared by processors. Each processor has cache store embedded within for its individual use. A one might contain from communication which is obsoleted operations of second processor. The clearing apparatus invalidates information any time accesses tables. cleared resetting tag directory indicators, round robin counter and column full flag, each four level set associative store. need not be cleared. Using permits invalidated 16 pulse burst signals 1K words directed indicators.