Virtual lockstep for fault tolerance and architectural vulnerability analysis

摘要: This dissertation presents a flexible technique that can be applied to commodity many-core architectures exploit idle resources and ensure reliable system operation. The proposed interposes dynamically-adaptable fault tolerance layer between the hardware operating through use of hypervisor. It avoids introduction new single point failure by incorporating hypervisor into sphere replication. approach greatly simplifies implementation over specialized hardware, system, or application-based techniques offers significant flexibility in type degree protection provided. possible levels considered range from duplex replication arbitrary n-modular limited only number processors system. feasibility is for both near- long-term computing platforms prototype developed as proof-of-concept used estimate performance overhead gather empirical data on capabilities. A detection latency reduction also analyzed using injection facilities provided prototype.