作者: Udupi R. Prasanna , Akshay K. Rathore
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摘要: The small-signal analysis of an active-clamped zero-voltage-switching current-fed isolated dc/dc converter is presented in this paper. State-space averaging used to derive the model. A closed-loop controller designed regulate output over a wide range power (1:10) and source voltage (1:2) with fixed frequency duty cycle modulation. Bode plots are using MATLAB PSIM 9.0 show response without controller. implemented on mixed-signal (analog digital) processor Cypress Programmable System-on-Chip (PSoC) 5. All components integrated PSoC 5 which compact, economical, easily configurable. 300-W prototype developed tested observe performance system. Experimental results for step change load different input conditions high controller, satisfactory transient converter, regulation continued safe operation.