A new architecture for FPGA based implementation of conversion of binary to double base number system (DBNS) using parallel search technique

作者: Satrughna Singha , Aniruddha Ghosh , Amitabha Sinha

DOI: 10.1145/2093339.2093343

关键词:

摘要: Compute intensive signal Processing Algorithms demand efficient execution of high performance arithmetic operations. Since, double base number system (DBNS) offers units, it is gaining attention to many researchers .However, the advantage DBNS can not be exploited due large conversion time from binary DBNS. Keeping this issue in view, paper presents a novel scheme using parallel search technique.

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