An Effective Test Generation System for Sequential Circuits

作者: Ralph Marlett

DOI: 10.5555/318013.318053

关键词:

摘要: This paper describes a test generation system capable of high fault coverage in complex sequential circuits. Sequential logic is efficiently processed by unidirectional time flow approach. single path sensitization technique dynamically expands to multi-path reconvergent fan-out structures. Sophisticated conflict analysis used reduce back-tracking. User guidance also accepted further improve performance.

参考文章(9)
Alexander Miczo, The Sequential ATPG: A Theoretical Limit. international test conference. pp. 143- 149 ,(1983)
Cha, Donath, Ozguner, 9-V Algorithm for Test Pattern Generation of Combinational Digital Circuits IEEE Transactions on Computers. ,vol. 27, pp. 193- 200 ,(1978) , 10.1109/TC.1978.1675071
Ralph A. Marlett, EBT: A Comprehensive Test Generation Technique for Highly Sequential Circuits design automation conference. pp. 335- 339 ,(1978) , 10.5555/800095.803112
O.H. Ibarra, S.K. Sahni, Polynomially Complete Fault Detection Problems IEEE Transactions on Computers. ,vol. 24, pp. 242- 249 ,(1975) , 10.1109/T-C.1975.224205
Barry C. Rosales, Prabhakar Goel, PODEM-X: An Automatic Test Generation System for VLSI Logic Structures design automation conference. pp. 412- 420 ,(1981) , 10.5555/800073.802309
J. Paul Roth, Diagnosis of automata failures: a calculus and a method Ibm Journal of Research and Development. ,vol. 10, pp. 278- 291 ,(1966) , 10.1147/RD.104.0278
R. G. Bennetts, Design of testable logic circuits ,(1984)
R. A. Marlett, An automatic test generation system for complex digital logic national aerospace and electronics conference. ,vol. 3, pp. 1207- 1210 ,(1982)